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X2816C 16K
X2816C
5 Volt, Byte Alterable E2PROM
DESCRIPTION
2048 x 8 Bit
FEATURES
* *
* *
* * *
90ns Access Time Simple Byte and Page Write --Single 5V Supply --No External High Voltages or VPP Control Circuits --Self-Timed --No Erase Before Write --No Complex Programming Algorithms --No Overerase Problem High Performance Advanced NMOS Technology Fast Write Cycle Times --16 Byte Page Write Operation --Byte or Page Write Cycle: 5ms Typical --Complete Memory Rewrite: 640ms Typical --Effective Byte Write Cycle Time: 300s Typical DATA Polling --Allows User to Minimize Write Cycle Time JEDEC Approved Byte-Wide Pinout High Reliability --Endurance: 10,000 Cycles --Data Retention: 100 Years
The Xicor X2816C is a 2K x 8 E2PROM, fabricated with an advanced, high performance N-channel floating gate MOS technology. Like all Xicor Programmable nonvolatile memories it is a 5V only device. The X2816C features the JEDEC approved pinout for byte-wide memories, compatible with industry standard RAMs, ROMs and EPROMs. The X2816C supports a 16-byte page write operation, typically providing a 300s/byte write cycle, enabling the entire memory to be written in less than 640ms. The X2816C also features DATA Polling, a system software support scheme used to indicate the early completion of a write cycle. Xicor E2PROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years.
PIN CONFIGURATION
LCC PLCC VCC WE A7 NC NC NC PLASTIC DIP SOIC A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 X2816C 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CE I/O7 I/O6 I/O5 I/04 I/O3
3852 FHD F02.1
4 A6 A5 A4 A3 A2 A1 A0 NC I/O0 5 6 7 8 9 10 11 12
3
2
1 32 31 30 29 28 27 26 A8 A9 NC NC OE A10 CE I/O7 I/O6
X2816C
13 21 14 15 16 17 18 19 20
I/O1 I/O2 VSS NC I/O3 I/O4 I/O5
NC
25 24 23 22
3852 FHD F03
(c)Xicor, 1995 Patents Pending 3852-1.4 3/27/96 T2/C3/D5 NS
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Characteristics subject to change without notice
X2816C
PIN DESCRIPTIONS Addresses (A0-A10) The Address inputs select an 8-bit memory location during a read or write operation. Chip Enable (CE) The Chip Enable input must be LOW to enable all read/write operations. When CE is HIGH, power consumption is reduced. Output Enable (OE) The Output Enable input controls the data output buffers and is used to initiate read operations. PIN NAMES Symbol A0-A10 I/O0-I/O7 WE CE OE VCC VSS NC Description Address Inputs Data Input/Output Write Enable Chip Enable Output Enable +5V Ground No Connect
3852 PGM T01
FUNCTIONAL DIAGRAM
X BUFFERS LATCHES AND DECODER A0-A10 ADDRESS INPUTS Y BUFFERS LATCHES AND DECODER
16,384-BIT E2PROM ARRAY
I/O BUFFERS AND LATCHES
I/O0-I/O7 DATA INPUTS/OUTPUTS CE OE WE VCC VSS
3852 FHD F01
CONTROL LOGIC
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X2816C
DEVICE OPERATION Read Read operations are initiated by both OE and CE LOW and WE HIGH. The read operation is terminated by either CE or OE returning HIGH. This two line control architecture eliminates bus contention in a system environment. The data bus will be in a high impedance state when either OE or CE is HIGH. Write Write operations are initiated when both CE and WE are LOW and OE is HIGH. The X2816C supports both a CE and WE controlled write cycle. That is, the address is latched by the falling edge of either CE or WE, whichever occurs last. Similarly, the data is latched internally by the rising edge of either CE or WE, whichever occurs first. A byte write operation, once initiated, will automatically continue to completion, typically within 5ms. Page Write Operation The page write feature of the X2816C allows the entire memory to be typically written in 640ms. Page write allows two to sixteen bytes of data to be consecutively written to the X2816C prior to the commencement of the internal programming cycle. Although the host system may read data from any other device in the system to transfer to the X2816C, the destination page address of the X2816C should be the same on each subsequent strobe of the WE and CE inputs. That is, A4 through A10 must be the same for each transfer of data to the X2816C during a page write cycle. The page write mode can be entered during any write operation. Following the initial byte write cycle, the host can write an additional one to fifteen bytes in the same manner as the first byte was written. Each successive byte load cycle, started by the WE HIGH to LOW transition, must begin within 20s of the falling edge of the preceding WE. If a subsequent WE HIGH to LOW transition is not detected within 20s, the internal automatic programming cycle will commence. There is no page write window limitation. The page write window is infinitely wide, so long as the host continues to access the device within the byte load cycle time of 20s. DATA Polling The X2816C features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the status of the X2816C, eliminating additional interrupt inputs or external hardware. During the internal programming cycle, any attempt to read the last byte written will produce the complement of that data on I/O7 (i.e., write data = 0xxx xxxx, read data = 1xxx xxxx). Once the programming cycle is complete, I/O7 will reflect true data. WRITE PROTECTION There are three features that protect the nonvolatile data from inadvertent writes. * Noise Protection--A WE pulse which is typically less than 10ns will not initiate a write cycle. * VCC Sense--All functions are inhibited when VCC is 3V, typically. * Write Inhibit--Holding either OE LOW, WE HIGH, or CE HIGH during power-up and power-down, will inhibit inadvertent writes. Write cycle timing specifications must be observed concurrently. ENDURANCE Xicor E2PROMs are designed and tested for applications requiring extended endurance.
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X2816C
SYSTEM CONSIDERATIONS Because the X2816C is frequently used in large memory arrays, it is provided with a two line control architecture for both read and write operations. Proper usage can provide the lowest possible power dissipation and eliminate the possibility of contention where multiple I/O pins share the same bus. To gain the most benefit, it is recommended that CE be decoded from the address bus and be used as the primary device selection input. Both OE and WE would then be common among all devices in the array. For a read operation this assures that all deselected devices are in their standby mode and that only the selected device(s) is outputting data on the bus. Because the X2816C has two power modes, standby and active, proper decoupling of the memory array is of prime concern. Enabling CE will cause transient current spikes. The magnitude of these spikes is dependent on the output capacitive loading of the l/Os. Therefore, the larger the array sharing a common bus, the larger the transient spikes. The voltage peaks associated with the current transients can be suppressed by the proper selection and placement of decoupling capacitors. As a minimum, it is recommended that a 0.1F high frequency ceramic capacitor be used between VCC and VSS at each device. Depending on the size of the array, the value of the capacitor may have to be larger. In addition, it is recommended that a 4.7F electrolytic bulk capacitor be placed between VCC and VSS for each eight devices employed in the array. This bulk capacitor is employed to overcome the voltage droop caused by the inductive effects of the PC board traces.
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X2816C
ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X2816C ....................................... -10C to +85C X2816CI ..................................... -65C to +135C Storage Temperature ....................... -65C to +150C Voltage on any Pin with Respect to VSS .................................. -1V to +7V D.C. Output Current ............................................. 5mA Lead Temperature (Soldering, 10 seconds)...... 300C RECOMMENDED OPERATING CONDITIONS Temperature Commercial Industrial Min. 0C -40C Max. +70C +85C
3852 PGM T02.2
*COMMENT Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage X2816C
Limits 5V 10%
3852 PGM T03.1
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) Limits Symbol ICC Parameter VCC Current (Active) Min. Typ.(1) 70 Max. 110 Units mA Test Conditions CE = OE = VIL All I/O's = Open Other Inputs = VCC CE = VIH, OE = VIL All I/O's = Open Other Inputs = VCC VIN = VSS to VCC VOUT = VSS to VCC, CE = VIH
ISB1
VCC Current (Standby)
35
50
mA
ILI ILO VlL(2) VIH(2) VOL VOH
Input Leakage Current Output Leakage Current Input LOW Voltage Input HIGH Voltage Output LOW Voltage Output HIGH Voltage
-1 2 2.4
10 10 0.8 VCC +1 0.4
A A V V V V
IOL = 2.1mA IOH = -400A
3852 PGM T02.2
Notes: (1) Typical values are for TA = 25C and nominal supply voltage and are not tested. (2) VIL min. and VIH max. are for reference only and are not tested.
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X2816C
ENDURANCE AND DATA RETENTION Parameter Minimum Endurance Data Retention POWER-UP TIMING Symbol tPUR(3) tPUW(3) Parameter Power-Up to Read Operation Power-Up to Write Operation Typ.(1) 1 5 Units ms ms
3852 PGM T04
Min. 10,000 100
Max.
Unit Cycles/Byte Years
3852 PGM T03
CAPACITANCE TA = +25C, f = 1MHz, VCC = 5V Symbol CI/O(3) CIN(3) Test Input/Output Capacitance Input Capacitance MODE SELECTION CE L L H X X OE L H X L X WE H L X X H Mode Read Write Standby and Write Inhibit Write Inhibit Write Inhibit I/O Power Max. 10 6 Units pF pF Conditions VI/O = 0V VIN = 0V
3852 PGM T05.1
A.C. CONDITIONS OF TEST Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels 0V to 3V 5ns 1.5V
3852 PGM T06.1
DOUT Active DIN Active High Z Standby -- -- -- --
3852 PGM T07
Note: (3) This parameter is periodically sampled and not 100% tested.
EQUIVALENT A.C. LOAD CIRCUITS
5V 1.92K OUTPUT 1.37K 100pF
6612 FHD F22.3
6
X2816C
A.C. CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.) Read Cycle Limits Symbol tRC tCE tAA tOE tLZ(4) tOLZ(4) tHZ(4) tOHZ(4) tOH Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time CE LOW to Active Output OE LOW to Active Output CE HIGH to High Z Output OE HIGH to High Z Output Output Hold from Address Change X2816C-90 Min. Max. 90 90 90 60 0 0 50 50 0 0 0 0 60 60 0 X2816C-12 Min. Max. 120 120 120 60 0 0 60 60 0 X2816C-15 Min. Max. 150 150 150 80 0 0 60 60 X2816C-20 Min. Max. 200 200 200 100 Units ns ns ns ns ns ns ns ns ns
3852 PGM T10.1
Read Cycle
tRC ADDRESS tCE CE tOE OE VIH WE tOLZ tLZ DATA I/O HIGH Z DATA VALID tAA tOH tHZ DATA VALID tOHZ
3852 FHD F04
Notes: (4) tLZ min., tHZ, tOLZ, and tOHZ are periodically sampled and not 100% tested. tHZ max. and tOHZ max. are measured from the point when CE or OE return HIGH (whichever occurs first) to the time when the outputs are no longer driven.
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X2816C
Write Cycle Limits X2816C-90 Symbol tWC(5) tAS tAH tCS tCH tCW tOES tOEH tWP tWPH tDV tDS tDH tDW tBLC Parameter Write Cycle Time Address Setup Time Address Hold Time Write Setup Time Write Hold Time CE Pulse Width OE HIGH Setup Time OE HIGH Hold Time WE Pulse Width WE HIGH Recovery Data Valid Data Setup Data Hold Delay to Next Write Byte Load Cycle Min. 5 80 0 0 80 10 5 80 50 100 35 5 10 1 50 10 10 1 Max. 10 5 100 0 0 100 10 10 100 50 100 X2816C-12,-15,-20 Min. Max. 10 Units ms ns ns ns ns ns ns ns ns ns s ns ns s s
3852 PGM T09.1
100
100
WE Controlled Write Cycle
tWC ADDRESS tAS tCS CE tAH tCH
OE tOES WE tDV DATA IN DATA VALID tDS DATA OUT HIGH Z
3852 FHD F05
tWP
tOEH
tDH
Notes: (5) tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device requires to automatically complete the internal write operation.
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X2816C
CE Controlled Write Cycle
tWC ADDRESS tAS CE tOES OE tOEH tCS WE tDV DATA IN DATA VALID tDS DATA OUT HIGH Z
3852 FHD F06
tAH tCW
tCH
tDH
Page Mode Write Cycle
OE (6)
CE tWP WE tWPH
(7)
tBLC
ADDR. *
I/O BYTE 0 BYTE 1 BYTE 2 BYTE n BYTE n+1
LAST BYTE BYTE n+2 tWC
*For each successive write within the page write operation, A4-A10 should be the same or writes to an unknown address could occur.
3852 FHD F07
Notes: (6) Between successive byte writes within a page write operation, OE can be strobed LOW: e.g. this can be done with CE and WE HIGH to fetch data from another memory device within the system for the next write; or with WE HIGH and CE LOW effectively performing a polling operation. (7) The timings shown above are unique to page write operations. Individual byte load operations within the page write must conform to either the CE or WE controlled write cycle timing.
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X2816C
DATA Polling Timing Diagram(10)
ADDRESS An An An
CE
WE tOEH OE tDW I/O7 DIN=X DOUT=X tWC
3852 FHD F08
tOES
DOUT=X
Note:
(10) Polling operations are by definition read cycles and are therefore subject to read cycle timings.
SYMBOL TABLE
WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don't Care: Changes Allowed N/A OUTPUTS Will be steady Will change from LOW to HIGH Will change from HIGH to LOW Changing: State Not Known Center Line is High Impedance
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X2816C
Normalized Active Supply Current vs. Ambient Temperature Normalized Standby Supply Current vs. Ambient Temperature
1.4 VCC = 5V
1.4 VCC = 5V
NORMALIZED ISB
NORMALIZED ICC
1.2
1.2
1.0
1.0
0.8
0.8
0.6 -55 +25 +125
3852 FHD F09.1
0.6 -55 +25 +125
3852 FHD F10.1
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
Normalized Access Time vs. Ambient Temperature
1.4 VCC = 5V NORMALIZED TAA 1.2
1.0
0.8
0.6 -55 +25 +125 AMBIENT TEMPERATURE (C)
3852 FHD F11.1
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X2816C
PACKAGING INFORMATION
24-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P
1.265 (32.13) 1.230 (31.24)
0.557 (14.15) 0.530 (13.46) PIN 1 INDEX PIN 1 1.100 (27.94) REF. 0.080 (2.03) 0.065 (1.65)
SEATING PLANE 0.150 (3.81) 0.125 (3.18)
0.162 (4.11) 0.140 (3.56)
0.030 (0.76) 0.015 (0.38)
0.110 (2.79) 0.090 (2.29)
0.065 (1.65) 0.040 (1.02)
0.022 (0.56) 0.014 (0.36)
0.625 (15.87) 0.600 (15.24)
TYP. 0.010 (0.25)
0 15
NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
3926 FHD F03
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X2816C
PACKAGING INFORMATION
32-LEAD PLASTIC LEADED CHIP CARRIER PACKAGE TYPE J
0.420 (10.67)
0.050" TYPICAL
0.030" TYPICAL 32 PLACES
0.510" TYPICAL 0.400"
0.050" TYPICAL
0.050 (1.27) TYP.
FOOTPRINT
0.300" REF 0.410"
0.045 (1.14) x 45
0.021 (0.53) 0.013 (0.33) TYP. 0.017 (0.43)
0.495 (12.57) 0.485 (12.32) TYP. 0.490 (12.45) 0.453 (11.51) 0.447 (11.35) TYP. 0.450 (11.43) 0.300 (7.62) REF. PIN 1
SEATING PLANE 0.004 LEAD CO - PLANARITY -- 0.015 (0.38) 0.095 (2.41) 0.060 (1.52) 0.140 (3.56) 0.100 (2.45) TYP. 0.136 (3.45) 0.048 (1.22) 0.042 (1.07)
0.595 (15.11) 0.585 (14.86) TYP. 0.590 (14.99) 0.553 (14.05) 0.547 (13.89) TYP. 0.550 (13.97) 0.400 (10.16)REF. 3 TYP.
NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. DIMENSIONS WITH NO TOLERANCE FOR REFERENCE ONLY
3926 FHD F13
13
X2816C
PACKAGING INFORMATION
32-PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE TYPE E
0.300 (7.62) BSC 0.150 (3.81) BSC 0.015 (0.38) 0.003 (0.08) 0.020 (0.51) x 45 REF.
PIN 1
0.095 (2.41) 0.075 (1.91) 0.022 (0.56) DIA. 0.006 (0.15)
0.200 (5.08) BSC 0.015 (0.38) MIN. 0.028 (0.71) 0.022 (0.56) (32) PLCS.
0.055 (1.39) 0.045 (1.14) TYP. (4) PLCS.
0.050 (1.27) BSC
0.040 (1.02) x 45 REF. TYP. (3) PLCS.
0.458 (11.63) 0.442 (11.22) 0.458 (11.63) -- 0.120 (3.05) 0.060 (1.52)
0.088 (2.24) 0.050 (1.27)
0.560 (14.22) 0.540 (13.71)
0.558 (14.17) --
0.400 (10.16) BSC
PIN 1 INDEX CORNER
NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. TOLERANCE: 1% NLT 0.005 (0.127)
3926 FHD F14
14
X2816C
PACKAGING INFORMATION
24-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0.290 (7.37) 0.299 (7.60) PIN 1 INDEX
0.393 (10.00) 0.420 (10.65)
PIN 1
0.014 (0.35) 0.020 (0.50) 0.598 (15.20) 0.610 (15.49)
(4X) 7
0.092 (2.35) 0.105 (2.65)
0.050 (1.27)
0.003 (0.10) 0.012 (0.30)
0.050" TYPICAL 0.010 (0.25) X 45 0.020 (0.50) 0.050" TYPICAL 0.009 (0.22) 0.013 (0.33) 0.015 (0.40) 0.050 (1.27) 0.420"
0 - 8
FOOTPRINT
0.030" TYPICAL 24 PLACES
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
3926 FHD F24
15
X2816C
ORDERING INFORMATION X2816C Device X X -X Access Time -90 = 90ns -12 = 120ns -15 = 150ns -20 = 200ns Temperature Range Blank = Commercial = 0C to +70C I = Industrial = -40C to +85C Package P = 24-Lead Plastic DIP J = 32-Lead PLCC E = 32-Pad LCC S = 24-Lead Plastic SOIC
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